GPT-6 Astra Designed the PCB. DeepPCB Routed It Better

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Alain-Sam Cohen

What a dedicated router still found in a board a frontier model had already finished.

microduck head, re-routed in DeepPCB. 132 of 132 connections, 14 layer-change vias, 1,104 mm of track.
microduck head, re-routed in DeepPCB. 132 of 132 connections, 14 layer-change vias, 1,104 mm of track.

GPT-6 Astra shipped this week and the demos are very good. Eight of them on the launch page. The first one is a circuit board.

Within a day people stopped watching demos and started running their own boards through it. One of them posted:

“Astra just ONE-SHOTTED my PCB for Microduck.”

It’s a compute module for a robot. 70 by 60 mm, four layers, 27 nets. One prompt produced a schematic, a placement and a routed board, and the whole project got published.

A year ago none of that existed.

We ran that file through DeepPCB. It did a better job. Let’s see what an RL router built only for routing found and produced.

The same board, same placement. Left: as published. Right: routed in DeepPCB.
The same board, same placement. Left: as published. Right: routed in DeepPCB.

Five widths, one rule

The Astra routing uses five track widths: 0.2, 0.25, 0.3, 0.5 and 1.5 mm. That’s right. Power rails want copper, signals don’t.

It declares one net class. The default, at 0.2 mm. Nothing is assigned to it.

A net class is how a board file says what a width is meant to be. It’s what a design rule check reads. With one empty class, four of those five widths can’t be checked. Nothing records that the 1.5 mm rail is 1.5 mm on purpose. Nothing warns you if something later narrows it.

The copper is right. Nobody wrote down the rule that says so.

9 vias inside pads

9 of the 32 vias sit inside a component pad.

That’s a real technique. On a dense board it buys space you can’t get any other way. It also commits you to a filled and capped process and a stencil review with your assembler.

This board has 27 nets on four layers. It had room.

DeepPCB put zero vias in pads, and covered every width with a rule.

What the extra vias are

The Astra routing has 32 vias. The DeepPCB one has 64. Most of that gap isn’t routing.

Split them by what they do. A via joining a track on one layer to a track on another is a routing decision. A via dropping a rail into a copper pour is a connection to a plane.

Layer changes: 15 in the Astra routing, 14 in the DeepPCB one.

The other 50 reach a plane. In DeepPCB, inner-2 was given a split power plane, so the rails run in pours instead of tracks. A rail in a pour has far less impedance than the same rail as a trace, which on a board with servo rails and a charger is usually what you want.

It costs holes, and it costs a layer. A power layer carries no traces, so that left two signal layers where the Astra routing used three.

Different call, not a worse route. 1,104 mm of track against 1,282. Fifteen minutes of routing.

The point

Neither of those is a reasoning failure.

A model reasons about what a board is for. It picks the parts. It knows a servo rail wants copper and a status LED doesn’t. From one sentence it got a working design onto the canvas, which nothing could do a year ago.

Routing is a different skill. An undeclared width can’t be checked. A via in a pad is a phone call to your assembler. You pick that up from doing it, not from thinking about it.

None of that is an argument against a model driving a router. Driving one is the right shape. It just doesn’t make the router underneath know more than it knows.

These models will keep getting better, and that means more boards. All of them still need routing. Astra shipping is good news here.

Any of them can drive a router like DeepPCB already, through the API or through Cooper, which we shipped in June.

The routed board is public if you want to have a look: https://app.deeppcb.ai/shared/OkkY9evleebogaa3XuSkDgXNF9r1MvYOEGlaVpSgUuw