GPT-6 Astra routed this board in 33 minutes. DeepPCB did it in 2, with the USB pair intact and half the layer changes.
Same board, same placement, and both connect all 98 airwires.
What differs is the quality of the routing: DeepPCB’s USB pair stays on one layer where Astra’s takes four vias, and the board needs half as many layer changes. Both boards are public.
STRF is a small RF-to-USB dongle: an STM32 and an nRF radio, four layers, 39 components, 98 connections. It’s open source, at github.com/pms67/STRF-Kicad, and it’s the kind of board a person routes in an afternoon and doesn’t think about again.
We gave it to GPT-6 Astra and to DeepPCB, same board, same placement, nothing moved.
Astra finished it. That’s worth saying first, because a year ago no model could. It took 26 minutes to reach a first result and worked another 7 minutes improving it. We ran the same head-to-head on a board Astra designed and placed from scratch where it left nine vias sitting inside component pads. DeepPCB also placed less layer-change vias and produced a cleaner routing.
DeepPCB took about two minutes.
Both boards complete all 98 connections. So the question isn’t whether they work. It’s what they did differently in the copper. Both boards are public.
The USB pair is where the difference shows
USB data runs as a differential pair. The two wires want to stay together, stay on one layer, and keep a solid reference plane underneath the whole way. Every via one taken is a break in that reference and a place the two halves stop matching.
STRF splits USB into two pairs, one at the connector and one at the MCU. Astra took the MCU pair across both outer layers: USB_D+ and USB_D- carry two vias each, four in all. It left the connector pair clean on top.
DeepPCB left both pairs on the top layer, with no vias on either.
That’s not a stylistic preference. It’s the one thing about this board that a signal integrity engineer would look at first.
The same pattern shows on the 5 V net. Astra spends four vias there. We spend none.
Fewer holes where holes are decisions
Most vias on any board with planes are just stitching a net down to its plane. Those aren’t routing decisions. The ones that are, where a track changes layer to get past something, tell you how well the router found its way.
Astra makes 14 of those. We make 6.
Where it goes the other way
Astra’s +5V copper is wider than ours, we spend more vias stitching ground, and our tracks run about 10 per cent longer. Both routers started from the same board with some copper already on it, so 38 segments are identical on both results.
What the router was told, and what it wasn’t
Our natural language assistant, Cooper, went over the board first and made a few recommendations. We took them and ran it.
None of them said keep the pair on one layer. They said what the pair was, what impedance it needed, what the stackup was, and which nets were the fast ones.
Keeping the pair on one layer was the router’s decision. That’s the part Cooper can’t do for it.
Which is the argument
Astra routed this board end to end and got it finished. That’s real and it’s new.
What it hasn’t got underneath is something that works in the space itself. Routing is a packing problem in two dimensions across four layers, and every track you commit takes room from the next one. Where a via will fit. What a detour costs three nets over. Which corner has to give. DeepPCB .
The interesting version isn’t a foundational LLM against DeepPCB. It’s a foundational LLM inside Cooper and orchestrating DeepPCB’s routing agent. A model says what the board is, which nets are a pair, what impedance they need, which layer is ground. Cooper turns that into constraints. The router lays the copper in two minutes. Each part does the thing it is built for.
So a better model makes this pairing better, not redundant. Astra shipping is good news for DeepPCB.
Both boards are public.
DeepPCB: https://app.deeppcb.ai/shared/CGKbu_ukFjXiC40yP0j6WthRlBNeaCY1BQqOJstlCsQ
Astra: https://app.deeppcb.ai/shared/F4kbXVax-9EVd1l5rL4GonMDpgkK0o51fDUxZF8xSmI
